View CY7C197N-25PXC_4860967.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CY7C197N
256Kx1 Static RAM
Features
* High speed -- 25 ns * CMOS for optimum speed/power * Low active power -- 880 mW * Low standby power -- 220 mW * TTL-compatible inputs and outputs * Automatic power-down when deselected
Functional Description
The CY7C197N is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C197N has an automatic power-down feature, reducing the power consumption by 75% when deselected. Writing to the device is accomplished when the Chip Enable (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A17). Reading the device is accomplished by taking chip enable (CE) LOW while Write Enable (WE) remains HIGH. Under these conditions the contents of the memory location specified on the address pins will appear on the data output (DOUT) pin. The output pin stays in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. The CY7C197N utilizes a die coat to insure alpha immunity.
Logic Block Diagram
DI
Pin Configurations
DIP Top View
INPUT BUFFER A13 A14 A15 A16 A17 A0 A1 A2 A3 A4
ROW DECODER
1024 x 256 ARRAY
SENSE AMPS
DO
A0 A1 A2 A3 A4 A5 A6 A7 A8 DOUT WE GND
1 24 2 23 22 3 4 21 5 20 6 7C197 19 18 7 8 17 9 16 10 15 14 11 12 13
VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 DIN CE
COLUMN DECODER
POWER DOWN
CE
A5 A6 A7 A8 A9 A10 A11 A12
WE
Selection Guide
-25 Maximum Access Time (ns) Maximum Operating Current (mA) Maximum Standby Current (mA) 25 95 30 30 -45 45
Cypress Semiconductor Corporation Document #: 001-06495 Rev. **
*
198 Champion Court
*
San Jose, CA 95134-1709 * 408-943-2600 Revised February 2, 2006
[+] Feedback
CY7C197N
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage to Ground Potential (Pin 24 to Pin 12) ........................................... -0.5V to +7.0V DC Voltage Applied to Outputs in High Z State[1] ....................................-0.5V to VCC + 0.5V DC Input Voltage[1] ................................ -0.5V to VCC + 0.5V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current .................................................... >200 mA
Operating Range
Range Commercial Ambient Temperature 0C to +70C VCC 5V 10%
Electrical Characteristics Over the Operating Range
-25, -45 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage[1] GND < VI < VCC GND < VO < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA, f = fMAX = 1/tRC Max. VCC, CE > VIH, VIN > VIH or VIN < VIL, f = fMAX Max. VCC, CE > VCC - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Input Load Current Output Leakage Current Output Short Circuit Current[2] VCC Operating Supply Current Automatic CE Power-Down Current--TTL Inputs[3] Automatic CE Power-Down Current--CMOS Inputs[3] Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL =12.0 mA 2.2 -0.5 -5 -5 Min. 2.4 0.4 VCC + 0.3V 0.8 +5 +5 -300 95 30 15 Max. Unit V V V V mA mA mA mA mA mA
Capacitance[4]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 8 10 Unit pF pF
Note: 1. V(min.) = -2.0V for pulse durations of less than 20 ns. 2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 3. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given. 4. Tested initially and after any design or process changes that may affect these parameters. 5. tr = < 5 ns for the -25 and slower speeds.
Document #: 001-06495 Rev. **
Page 2 of 7
[+] Feedback
CY7C197N
AC Test Loads and Waveforms[5]
R1 329 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE 5V OUTPUT R2 5 pF 202 (255 MIL) INCLUDING JIG AND SCOPE Equivalent to: R2 255 (255 MIL) 3.0V 10% GND < tr < tr R1 329 ALL INPUT PULSES 90% 90% 10%
(a)
(b)
THEVENIN EQUIVALENT 125 OUTPUT 1.90V
Commercial
Switching Characteristics Over the Operating Range[8]
-25 Parameter READ CYCLE tRC tAA tOHA tACE tLZCE tHZCE tPU tPD WRITE tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE tHZWE Read Cycle Time Address to Data Valid Output Hold from Address Change CE LOW to Data Valid CE LOW to Low Z[9] 3 0 0 20 25 20 20 0 0 20 15 0 3 0 11 45 40 40 0 0 30 20 0 3 0 15 11 CE HIGH to High Z[9, 10] CE LOW to Power-Up CE HIGH to Power-Down CYCLE[11] Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE HIGH to Low Z[9] WE LOW to High Z
[9, 10]
-45 Max. Min. 45 25 45 3 25 3 0 0 30 15 45 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Description
Min. 25 3
Note: 6. Tested initially and after any design or process changes that may affect these parameters. 7. tr = < 5 ns for the -25 and slower speeds. 8. Test conditions assume signal transition time of 5 ns or less for -25 and slower speeds, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE and tHZWE is less than tLZWE for any given device. 10. tHZCE and tHZWE are specified with CL = 5 pF as in part (b) in AC Test Loads and Waveforms. Transition is measured 500 mV from steady-state voltage. 11. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
Document #: 001-06495 Rev. **
Page 3 of 7
[+] Feedback
CY7C197N
Switching Waveforms
Read Cycle No. 1[12, 13]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
Read Cycle No. 2[12]
CE tACE tLZCE DATA OUT HIGH IMPEDANCE
tRC
tHZCE DATA VALID tPD
HIGH IMPEDANCE
VCC SUPPLY CURRENT
tPU 50%
ICC 50% ISB
Write Cycle No. 1 (WE Controlled)[11]
tWC ADDRESS tSCE CE tSA WE tSD DATA IN DATA VALID tHZWE DATA OUT DATA UNDEFINED tLZWE HIGH IMPEDANCE
C197-8
tAW tPWE
tHA
tHD
Notes: 12. WE is HIGH for read cycle. 13. Device is continuously selected, CE = VIL. 14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Document #: 001-06495 Rev. **
Page 4 of 7
[+] Feedback
CY7C197N
Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled)[11, 14]
tWC ADDRESS tSA CE tAW tPWE WE tSD DATA IN DATA OUT DATA VALID HIGH IMPEDANCE tHD tHA tSCE
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED ICC, ISB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 ISB 25 125 AMBIENT TEMPERATURE (C) VIN = 5.0V VCC = 5.0V ICC NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE ICC OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE(V) VCC = 5.0V TA = 25C
1.4 NORMALIZED ICC, ISB 1.2 1.0 0.8 0.6 0.4 0.2
VIN = 5.0V TA = 25C ISB 4.5 5.0 5.5 6.0
0.0 4.0
SUPPLY VOLTAGE (V) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED tAA NORMALIZED tAA 1.3 1.2 1.1 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE(V) TA = 25C 1.6 1.4 1.2 1.0
OUTPUT SINK CURRENT (mA)
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE
140 120 100 80 60 40 20
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE
VCC = 5.0V 0.8 0.6
VCC = 5.0V TA = 25C
-55
25 125 AMBIENT TEMPERATURE(C)
0 0.0
1.0
2.0
3.0
4.0
OUTPUT VOLTAGE(V)
Document #: 001-06495 Rev. **
Page 5 of 7
[+] Feedback
CY7C197N
Typical DC and AC Characteristics (continued)
TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 (ns) NORMALIZED IPO 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 NORMALIZED ICC 25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 VCC = 4.5V TA = 25C NORMALIZED ICC vs. CYCLE TIME 1.25 VCC = 5.0V TA = 25C VIN = 5.0V
DELTA tAA
1.00
0.75
600
800 1000
0.50 10
20
30
40
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
CYCLE FREQUENCY (MHz)
CY7C197N Truth Table
CE H L L WE X H L High Z Data Out Data In Input/Output Deselect/Power-Down Read Write Mode
Ordering Information
Speed (ns) 25 45 Ordering Code CY7C197N-25PXC CY7C197N-45PXC Package Diagram 51-85013 51-85013 Package Type 24-Lead (300-Mil) Molded DIP (Pb-free) 24-Lead (300-Mil) Molded DIP (Pb-free) Operating Range Commercial Commercial
Please contact local sales representative regarding availability of these parts.
Package Diagram
24-Lead (300-Mil) PDIP (51-85013)
51-85013-*B
All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 001-06495 Rev. ** Page 6 of 7
(c) Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
[+] Feedback
CY7C197N
Document History Page
Document Title: CY7C197N 256Kx1 Static RAM Document Number: 001-06495 REV. ** ECN NO. 424111 Issue Date See ECN Orig. of Change NXR Description of Change New Data Sheet
Document #: 001-06495 Rev. **
Page 7 of 7
[+] Feedback

▲Up To Search▲

Price & Availability of CY7C197N-25PXC

	To Download CY7C197N-25PXC Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .